Semiconductor devices contain regions or junctions "doped" with ions of a different composition than the bulk material. Several techniques are available to form doped regions. Of these techniques, ion implantation is the most common. Ions are injected into semiconductor surfaces at an energy and dose to achieve desired junction depths. Such implant energies and implant doses are selected according to the desired junction depth. Implant energies also vary with the type of ion being implanted.
Using ion implantation is advantageous over diffusion doping, another doping technique. Diffusion doping requires clean surfaces, free of contaminants and other defects, which can act as diffusion barriers. Furthermore, diffusion doping does not allow for precise control of the number of diffused dopant species.
One challenge while using ion implantation is that it creates lattice damage due to the high energy required to implant ions to certain depths. When implanted ions enter a semiconductor substrate, they undergo numerous scatterings, displacing atoms in the lattice along the way. The path which an ion makes through a semiconductor substrate is marked with lattice defects, such as vacancies, interstitials, and/or dislocations. Subsequent annealing steps are needed to remove the damage due to implanted ions.
Annealing time varies, depending on the implant energy used and the type of ions implanted. Longer annealing times can present a problem in that dopants tend to migrate, often farther than they should, resulting in deeper junctions and smaller dopant gradients, when heat is applied. The longer a structure is held at a certain temperature, the more time dopants have to migrate into undesired areas. When lattice damage is severe enough, it is often impossible to reduce the lattice defects to a desirable level without disrupting other regions in a structure. While raising the annealing temperature shortens the time period required to reduce lattice defects in a structure, this does not cure the problem associated with annealing because dopants tend to migrate at a faster rate into undesired areas. When considering annealing steps, it is also important to keep in mind the thermal budget of the process. More heat or a longer annealing time increases the thermal budget. Thus, subsequent thermal steps have to be ignored completely, often resulting in not being able to completely fabricate a manufacturable circuit.
As semiconductor integrated circuits (ICs) are becoming more dense, scaled devices with reduced feature sizes are much more sensitive and control of fabrication parameters is more stringent. Moreover, doped regions within devices are also becoming much shallower. Problems associated with ion implantation discussed above make it even more difficult to precisely control the depth of implanted ions in shallow regions and keep these regions free from any damage. Implanted ions travel in a path through an implanted substrate, which often comprises ions which straggle from desired paths due to inconsistencies in the number of scatterings that occur in its path. Straggle causes implanted ions to migrate into regions outside of the narrow perimeter in which ions are being implanted. Furthermore, surface and junction damage created by ion implantation is even more difficult to remove. Long, high temperature anneals required to remove such lattice damage are even more of a problem due to the smaller distances which dopants have to travel before they migrate into undesired areas.
Due to the trend of decreasing device sizes in ICs, there is a need for doping shallow regions in semiconductor structures in a manner in which damage due to ion implantation is prevented. Long, high-temperature anneals can degrade device performance. Therefore, there is a need to prevent the need for such damage anneals, by preventing damage during implantation. There is a further need for decreasing the thermal budget required for forming such doped regions.